What is Parasitic Capacitance?
Cause analysis:
Through comparative analysis, it is found that the parasitic capacitance of different brands and models of MOS tubes is obviously different, the CISS capacitance of the MOS tube used in the original design is much larger than the CISS capacitance of the substitut
1-2. Power diode parasitic capacitance
When the diode is forward-conducted, electrons are stored in the P-region and holes are stored in the N-region, a phenomenon called the charge storage effect. When the reverse voltage is applied, the electrons and holes move in opposite directions respectively, forming a reverse drift current, and at the same time recombine with most other carriers, and after the electrons and holes are significantly reduced, the reverse recovery process is completed, and the diode is cut off.
Figure 4: Diagram of diode reverse recovery current
Ø The amount of charge storage determines the reverse recovery time, and the amount of stored charge is determined by the size of the reverse recovery capacitance. The reverse recovery capacitance of the diode affects the reverse recovery time, which affects the size of the voltage spike when the diode is turned off, and the current oscillation that occurs when the diode is turned off.
Figure 5: Diagram of diode reverse recovery capacitance
1-3. Parasitic capacitance between the power switching device and the heat sink
Plug-in power switching devices usually need to use a heat sink to dissipate heat, and a distributed capacitance is formed between the power device body and the heat sink, which provides a coupling path for high-frequency noise. When using chip power devices, a PCB copper pour is used for heat dissipation, and the distributed capacitance between the heat dissipation copper skin and the reference ground also provides a coupling path for high-frequency noise currents.
Figure 6: Parasitic capacitance between the power device and the heat sink
1-4. Parasitic capacitance of magnetic devices
The distributed capacitance between the windings of the switching transformer and between the windings and the same winding provides a coupling path for the coupling of high-frequency noise currents. The distributed capacitance between the winding of the inductor device and the common mode inductive device, the high-frequency noise is directly coupled to the back-end through the distributed capacitance, which short-circuits the inductor and loses the high-frequency filtering effect. The distributed capacitance between the core and the reference ground provides a path for the coupling of high-frequency noise, so that part of the high-frequency noise is not filtered by the magnetic device.
Figure 7: Model of parasitic capacitance of a transformer
1-5. Parasitic capacitance generated by metallic conductors
The distributed capacitance between the two metal conductors close to each other and insulated from each other constitutes a distributed capacitance, and the distributed capacitance between the metal conductors constitutes an electric dipole antenna driven by the noise signal, which efficiently emits the noise signal and causes serious radiation emission problems.
Figure 8: Capacitance distributed between metal structures
1-6. Parasitic capacitance between PCB wiring
There is also parasitic capacitance between two routes that are close to each other on the PCB board, and parasitic capacitance between the PCB traces is one of the main causes of crosstalk problems. The distributed capacitance between the PCB layout and the adjacent reference plane is the main path for high-frequency noise coupling back to the source, which reduces the high-frequency reflow path of the signal and reduces the emission ability of high-frequency noise.
Figure 9: PCB Layout parasitic capacitance between routing
1-7. Other types of parasitic capacitance
Distributed capacitance is ubiquitous, and in addition to the above distributed capacitance, there are many other forms of parasitic capacitance:
Ø Parasitic capacitance between the pins of the semiconductor chip
Ø The distribution capacitance between the wires inside the cable
Ø The distributed capacitance between the internal wire of the cable and the metal shield
Ø The distributed capacitance between the metal conductor and the magnetic core of the magnetic device
Ø The distributed capacitance between the semiconductor chip and the heat sink
Ø Distributed capacitance between PCB stacks
2. Analysis of the influence of parasitic capacitance
Parasitic capacitance is ubiquitous, discreet, and cannot be measured by instruments. Therefore, the effect of parasitic capacitance is very difficult to analyze, which poses a great challenge to the analysis and debugging of EMC problems.
2-1. Parasitic capacitance changes the signal reflow path
The area of the high-frequency current loop is an important factor affecting radiated emissions, and the controllable area of the current loop is an important prerequisite for ensuring EMC performance.
The presence of parasitic capacitance will change the return path of high-frequency currents, and its loop area will also become larger, and the loss of control will cause serious EMC problems.
Figure 10: Parasitic capacitance changes the signal transmission path
2-2. Parasitic capacitive capacitive coupling crosstalk
During the EMC problem analysis and debugging of the switching power supply, it was found that capacitive coupling was an important cause of the non-compliance of the conductive disturbance test on the power supply.
Capacitive coupling often occurs between two wiring lines with a large potential difference, and capacitive coupling will reduce the performance of the filter, or even bypass it and fail.
Figure 11: Parasitic capacitance initiates capacitive coupling
2-3. Parasitic capacitance produces parasitic oscillations
Parasitic oscillations often occur between the parasitic capacitance between the pins of power devices such as diodes, MOS transistors, and semiconductor chips, and the parasitic inductance of inductive devices, transformers, beads, and PCB layout wiring in the line. Parasitic oscillation in switching power supply products is one of the important reasons for substandard EMI testing, and it is easy to be ignored by design engineers.
Figure 12: Parasitic oscillation waveform generated by parasitic capacitance
2-4. Parasitic capacitance generates dipole antennas
Metal conductors are often used for electromagnetic interference shielding, and a good overlap between metal conductors is a prerequisite for high-quality shielding results. The actual structure design takes into account the oxidation of metal conductors, and sprays insulating paint on the metal surface to avoid the problem of metal oxidation.
When the high-frequency noise current flows through one of the conductors, it will generate an induced electromotive force on the other conductor to form an electric dipole antenna, which will radiate the noise.
Figure 13: Parasitic capacitance forms an electric dipole antenna
3. How to solve the influence of parasitic capacitance
Parasitic capacitance is often the natural enemy of EMC engineers, and the reasonable and appropriate handling of parasitic capacitance problems has become a huge test for EMC engineers.
3-1. Solve the problem of parasitic capacitance of power devices
According to the analysis of the influence on the parasitic capacitance of power devices, combined with the feasibility of the actual debugging process, the following solutions are formulated for the problem of parasitic capacitance of power devices:
Figure 14: Parasitic oscillation waveform from parasitic capacitance
Ø Add RC absorption circuit between the pins of the power device to change the parasitic capacitance
Figure 14: Increased RC absorption in a power diode changes parasitic capacitance
Ø Increase the distance between the power device body and the heat sink to reduce the parasitic capacitance
Ø Replace different types of devices and different brands of devices to change the parasitic capacitance
Ø The current loop of the power device increases the magnetic bead to suppress the parasitic oscillation
图15: 功率器件环路串联磁珠抑制寄生振荡
Figure 15: The power device loop series beads suppress parasitic oscillations
Ø Reduce the parasitic inductance of PCB wiring and suppress the parasitic oscillation
Ø The heat sink of the power device suppresses the parasitic oscillation by resistor grounding
Ø Increase high-frequency bypass capacitance to suppress parasitic oscillation
Ø The heat sink of the power device is grounded to reduce the parasitic capacitance
3-2. Solve the problem of parasitic capacitance of magnetic core devices
The parasitic capacitance of the magnetic core device is mainly related to the winding mode of the magnetic device, the isolation between the windings, and the distributed capacitance of the magnetic core to the reference ground.
Ø Increase the distance between the windings and reduce the parasitic capacitance
Ø Increase shielding between windings to reduce parasitic capacitance
Ø Reduce parasitic capacitance by adjusting the density of wire winding
Ø Reduce the influence of parasitic capacitance by adjusting the potential difference between adjacent windings
Ø Adjust the grounding mode of the shield layer and change the parasitic capacitance
Ø The magnetic core is shielded to the ground to reduce the parasitic capacitance
3-3. How to reduce the parasitic capacitance between metal structures
For the parasitic capacitance between metal structures, the main consideration is to increase the distance and reduce the influence of the parasitic capacitance by means of low impedance lapping, and the following solutions are formulated:
Ø Increase the distance between metal bodies and reduce parasitic capacitance
Ø The metal body reduces the parasitic capacitance of the short circuit through low impedance lap joint
Ø The metal structure crosses the anti-oxidation metal and establishes the equipotential body
Ø The metal structure is far away from the position of high alternating voltage to reduce the parasitic capacitance
3-4. How to parasitic capacitance between PCB wiring
For the parasitic capacitance between PCB wiring, the main consideration is to increase the distance and increase the shielding to reduce the impact of parasitic capacitance, and the following solutions are formulated:
Ø Increase the distance between PCB wiring and reduce parasitic capacitance
Ø Ground wire shielding is added between PCB wiring to reduce parasitic capacitance
Ø Increase the layer spacing and reduce the parasitic capacitance between the layers
Ø Shorten the parallel distance between PCB wiring and reduce parasitic capacitance
Ø Vertical cross wiring is adopted to reduce parasitic capacitance.
material, and the CISS capacitance has an impact on the opening and shutdown of the
MOS tube, the larger the capacitor, the slower the switching speed, the smaller the noise energy generated, and vice versa, the greater the noise energy generated. The larger the capacitance The lower the oscillation frequency and the smaller the peak value while the parasitic inductance is constant.